1. Field of the Invention
The present invention relates to a liquid crystal display device and a method of driving the same and, more particularly, to a liquid crystal display device having an auxiliary capacitance at each pixel and method for driving such a liquid crystal display device.
2. Description of the Related Art
In the conventional liquid display device in which each pixel made of liquid crystal is provided with a switching element such as a thin film transistor (TFT), a voltage is applied to the liquid crystal across the switching element. FIG. 21 is a diagrammatic view illustrating each pixel 100 in the conventional liquid crystal display device and FIG. 22 is a diagrammatic view illustrating a pixel structure for each row. A pixel electrode (Pix) 101 is charged to a source potential via a transistor 102. With voltage (Vcom) applied to a counter electrode (COM) 103 to drive the counter electrode, a difference in potential between the counter electrode 103 and the pixel electrode 101 generates the liquid crystal driving voltage (Vlcd).
A substrate 104 is formed with an auxiliary capacitance electrode (Cs) 105, which reduces potential variations on the pixel electrode 11 which occurs due to a gate potential change at transistor 102 and/or due to a leakage current during the “off” period. Normally, the wiring for the auxiliary capacitance electrode 105 is disposed in parallel with the gate wiring.
The wiring of the auxiliary capacitance electrode 105 is connected to the counter electrode 103. Thus, the potential of the auxiliary capacitance electrode 105 is the same as that of the counter electrode 103. The liquid crystal is driven by an alternating current (AC) to prevent burning and electrolysis.
FIG. 23 is a timing diagram illustrating driving waveforms in the above-mentioned liquid crystal display device. Waveform (A) shows a waveform of voltage applied to the counter electrode. Waveform (B) shows a signal line voltage waveform. Waveform (C) is a scanning line voltage waveform, and waveform (D) shows a liquid crystal driving voltage waveform. As shown in the figure, the voltage waveform applied to the counter electrode (Vcom) and the voltage waveform (Vs) applied to the transistor source electrode are rectangular. The scanning line voltage is applied to the transistor gate electrode (Vg). As shown in waveform FIG. 23(C), the transistor is turned on and becomes conductive when a high voltage is applied to its gate, whereas the transistor is turned off and becomes non-conductive when a low voltage is applied to its gate.
During the holding time in which the transistor is turned off, the liquid crystal driving voltage (Vlcd) remains constant even when the voltage (Vcom) applied to the counter electrode rises and falls. Because the polarity of the Vs and Vcom is reversed for the next scanning period, the liquid crystal is AC driven as its driving voltage (Vlcd) becomes positive and negative alternatively for each scanning period.
Generally, the liquid crystal display device needs to be driven at a voltage of ±4V to 5 V. As shown in FIG. 23, the rectangular wave of signal line voltage (Vs) and the rectangular wave of the counter electrode voltage (Vcom) together create an AC driving voltage. These signal waveforms are supplied from a driver LSI. A recent trend of lowering the voltage for LSI had caused the maximum voltage between Vcom and Vs to drop to as low as about 4.8 V. Although this voltage restriction is not absolute, in order to generate a voltage greater than this range of voltage from the driver LSI, a significant design change for the LSI breakdown voltage is required, entailing a large increase in area and cost of the LSIs. Because driving liquid crystal display devices requires a voltage of about ±4 to 5 volts as mentioned above, this limitation to the LSI operational voltage barely makes its use in the driving circuitry possible. However, for recently developed liquid crystal display devices of a new mode (with n-type liquid crystal of vertical alignment mode or transverse field mode), there emerge many cases where voltages in excess of 5 volts are required to achieve their full potential for high performance. This cannot be properly handled by the current LSI.
Japanese Patent Laid Open Application, JP 2001-255851 A (“JP '851” hereinafter) discloses a liquid crystal driving method in which the auxiliary capacitance electrodes are driven separately from the counter electrode, thus they are not connected to each other, to effectively increase voltages applied to pixels. In this case, the auxiliary capacitance is formed by the auxiliary capacitance electrode, the pixel electrode, and the insulation layer disposed between the auxiliary capacitance electrode and the pixel electrode. FIG. 24 is a block diagram of the liquid crystal display device shown in JP '851 and FIGS. 25 and 26 are waveform charts illustrating gate and auxiliary capacitance drive signals and voltages applied to the pixel, respectively.
In FIG. 24, the area surrounded by the dotted line 111 defines a display section for displaying an image with a plurality of pixels. The display section is scanned by scanning lines G1, G2, G3, . . . , Gn and display signals are provided by signal lines S1, S2, S3, . . . , Sm.
Thin film transistors (TFT) 114 are arranged at intersections of the scanning lines G1, G2, G3, . . . , Gn and the signal lines S1, S2, S3, . . . , Sm. A liquid crystal cell 115 is disposed in a pixel electrode part connected to the drain of the respective thin film transistor 114. The gate of the transistor is connected to a scanning line G and its source is connected to a signal line S.
A scanning line driving circuit 116 successively scans the scanning lines G1, G2, G3 . . . , Gn so that rows of pixels are selected for each horizontal scanning period progressively from the top to the bottom, for example. A signal line driving circuit 117 outputs display signals through the signal lines S1, S2, S3, . . . , Sm to provide various pixel voltages to a row of liquid crystal cells selected by a scanning line driving circuit 116 in each horizontal scanning period via transistors 114. A counter electrode 118 and its wiring lines are provided on a transparent substrate that is disposed opposite to the substrate having the above-mentioned TFTs, the pixel electrodes, etc. These two substrates sandwich the liquid crystal cells 115.
A counter electrode driving circuit 119 applies a common counter electrode voltage Vcom across all the liquid crystal cells via the counter electrode 118. One end of an auxiliary capacitance 112 provided for each pixel is connected to the drain of a transistor 114 and its other end is connected to an auxiliary capacitance line 113. As shown in the figure, a separate auxiliary capacitance line is provided for a respective row of pixel. The auxiliary capacitance line 113 for the first row of pixels is connected to a first output terminal of the auxiliary capacitance line driving circuit 110, and the auxiliary capacitance line 113 for the second row of pixels is connected to a second output terminal of the auxiliary capacitance line driving circuit 110. The auxiliary capacitance lines 113 for the third and subsequent rows of pixels are likewise connected to respective separate terminals of the auxiliary capacitance line driving circuit 110. Auxiliary capacitance driving voltages Vst1 to Vstn are output at different timings for the scanning lines G1 to Gn from the first to nth output terminals of the auxiliary capacitance line driving circuit 110, respectively.
The liquid crystal display device of the JP '851 reference operates as shown by the timing diagram of FIG. 25. Waveform (A) shows gate signals Gsig.1, Gsig.2, . . . output from the scanning lines G1, G2, . . . , respectively, and waveform (B) shows auxiliary capacitance line driving voltages Vst1, Vst2, . . . output from the auxiliary capacitance line driving circuit 110. The gate signals Gsig.1, Gsig.2, . . . are pulses output from the scanning line driving circuit 116 of FIG. 24 for the selection of scanning lines and have a cycle period of one frame. The gate signals Gsig will have a voltage Vgh when a row of pixels are selected and will have a voltage Vg1 when they are not selected. The auxiliary capacitance line driving voltages Vst1, Vst2, . . . are a two-level voltage signal with an amplitude ΔVst. As shown in the figure, the auxiliary capacitance line driving voltage Vst1 changes by the amplitude ΔVst with a little delay after the corresponding gate signal Gsig.1 falls. The amplitude for the auxiliary capacitance line driving voltage Vst2 changes in time in a similar manner.
In the liquid crystal display device shown in JP '851, a voltage is applied to each pixel as shown in the waveform chart of FIG. 26. The gate signal Gsig shown in the figure is output for the scanning line Gi (i=1, 2, 3, . . . , n) selected from the scanning line driving circuit 116. The voltage will be Vgh when a row of pixels are selected and Vgl when they are not selected. A DC counter electrode voltage Vcom is output from the counter electrode driving circuit 119. Thus Vcom is constant. The voltage Vd, which is the voltage at the pixel electrode, has its level changing positive and negative centering around the counter electrode voltage Vcom at a period of one frame. When a scanning gate line is selected, the pixel electrode of a liquid crystal cell 115 on the selected row is charged to a signal voltage Vsig supplied via the signal line S. However, when the gate signal Gsig changes from Vgh to Vgl, the voltage Vd at the pixel electrode exhibits a sudden drop of voltage in the amount of Vpt due to a capacitive coupling involving a parasitic capacitance Cdg between the drain and the gate of the transistor 114. As shown in the figure, shortly thereafter, the auxiliary capacitance line driving voltage Vst falls by ΔVst, which causes the voltage Vd at the pixel electrode to further drop by K·ΔVst. Here, K is a constant that depends on the values of the capacitances involved in the capacitive coupling. In this way, a voltage Vdl which is a difference between the counter electrode voltage Vcom and the voltage Vd at the pixel electrode is applied to the liquid crystal cell 115 as the driving voltage.
In more detail, the constant K is given by equation (1) below.K=Cst/(Clc+Cst+Cdg)  (1)Here, Cst is the capacitance of auxiliary capacitance 112, Clc is the capacitance of the liquid crystal cell 115 and Cdg is the parasitic capacitance between the drain and the gate of the transistor 114.
When the scanning line Gi is again selected in the next frame, the same pixel at this time receives a signal voltage Vsig supplied via the corresponding signal line Sj. Vsig is elevated to provide for a substantially symmetrical waveform around the Vcom level. As shown in FIG. 26, when the voltage of the gate signal Gsig,i changes from Vgh to Vgl, the voltage at the pixel electrode Vd drops by Vpt due to a capacitive coupling involving the parasitic capacitance Cdg between the drain and the gate of the transistor 114. Then, shortly thereafter, the auxiliary capacitance driving voltage Vst rises by ΔVst, causing the voltage Vd at the pixel electrode to rises by K·ΔVst (where K is the same constant as before). Thereafter, the raised voltage is substantially maintained so that the voltage corresponding to a difference between the voltage Vd and the counter electrode voltage Vcom is applied to the liquid crystal cell 115 as the driving voltage. In this way, the liquid crystal panel is AC driven frame by frame.
Thus, as shown in FIG. 25, in a frame period in which the voltage Vd is lower than Vcom, the written signal Vsig is shifted downwardly by the amount Vpt, and is further shifted downwardly by the amount K·ΔVst away from Vcom. On the other hand, in a frame period in which the voltage Vd is higher than Vcom, the written voltage Vsig is shifted downwardly by the amount Vpt and is subsequently shifted upwardly by the amount K·ΔVst.
Therefore, when displaying a non-black image at a respective liquid crystal cell 115, given a desired target driving voltage amplitude of Vdl to be Vdl1 higher than Vdl0, a smaller voltage Vsig is required to generate Vdl1 that applies across the liquid crystal cell. In other words, since the voltage Vd imparted to the liquid crystal cell 115 is thus shifted by K·ΔVst away from Vcom on each side, it is possible to make the peak-to-peak amplitude Vspp′ of the voltage signals applied to the signal lines smaller than the peak-to-peak amplitude Vspp for the signal limes for the conventional liquid crystal cell.
In the method of driving an auxiliary capacitance electrode which is described in JP '851, a DC voltage is applied to the counter electrode and a potential to the auxiliary capacitance electrode is driven separately from the counter electrode in synchronism with the frame cycle period so as to effectively raise the liquid crystal driving voltage (Vlcd).
However, the output signal Vst1 from the auxiliary capacitance line driving circuit 110 is a two-level voltage signal having an amplitude ΔVst and has the raising and trailing edges slightly delayed after the gate signal Gsig,1 drops. Thus, the auxiliary capacitance line driving voltages Vst need to have a waveform that is unique as compared with the waveforms of the signals on the signal lines, scanning lines, and the counter electrodes. As a result, the circuitry for providing the auxiliary capacitance line driving circuit is necessarily complex.
In the conventional liquid crystal display device shown in FIG. 23, the liquid crystal driving voltage (Vlcd) is generated as a combination of rectangular waves of the signal line voltage (Vs) and the counter electrode voltage (Vcom). As a result, if the liquid crystal driving voltage needs to be raised, a driving LSI or circuitry with increased output voltages is necessary. To have an increased signal line voltage without using such a driving LSI with an increased output voltage, one may consider using a method similar to that disclosed in JP '851 to raise the liquid crystal driving voltage by driving the auxiliary capacitance electrode. However, because JP '851 applies a DC voltage to the counter electrode, the method cannot be applied to cases where the counter electrode voltage is driven with a rectangular wave. In the conventional liquid crystal display device as shown in FIG. 23, therefore, there is a problem in that no specific circuit makeup or driving method has yet been available to raise the liquid crystal driving voltage economically and efficiently.